1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
|
/* Atomic operations used inside libc. Linux/SH version.
Copyright (C) 2003-2014 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <stdint.h>
typedef int8_t atomic8_t;
typedef uint8_t uatomic8_t;
typedef int_fast8_t atomic_fast8_t;
typedef uint_fast8_t uatomic_fast8_t;
typedef int16_t atomic16_t;
typedef uint16_t uatomic16_t;
typedef int_fast16_t atomic_fast16_t;
typedef uint_fast16_t uatomic_fast16_t;
typedef int32_t atomic32_t;
typedef uint32_t uatomic32_t;
typedef int_fast32_t atomic_fast32_t;
typedef uint_fast32_t uatomic_fast32_t;
typedef int64_t atomic64_t;
typedef uint64_t uatomic64_t;
typedef int_fast64_t atomic_fast64_t;
typedef uint_fast64_t uatomic_fast64_t;
typedef intptr_t atomicptr_t;
typedef uintptr_t uatomicptr_t;
typedef intmax_t atomic_max_t;
typedef uintmax_t uatomic_max_t;
#define __HAVE_64B_ATOMICS 0
#define USE_ATOMIC_COMPILER_BUILTINS 0
/* SH kernel has implemented a gUSA ("g" User Space Atomicity) support
for the user space atomicity. The atomicity macros use this scheme.
Reference:
Niibe Yutaka, "gUSA: Simple and Efficient User Space Atomicity
Emulation with Little Kernel Modification", Linux Conference 2002,
Japan. http://lc.linux.or.jp/lc2002/papers/niibe0919h.pdf (in
Japanese).
B.N. Bershad, D. Redell, and J. Ellis, "Fast Mutual Exclusion for
Uniprocessors", Proceedings of the Fifth Architectural Support for
Programming Languages and Operating Systems (ASPLOS), pp. 223-233,
October 1992. http://www.cs.washington.edu/homes/bershad/Papers/Rcs.ps
SuperH ABI:
r15: -(size of atomic instruction sequence) < 0
r0: end point
r1: saved stack pointer
*/
#if __GNUC_PREREQ (4, 7)
# define rNOSP "u"
#else
# define rNOSP "r"
#endif
#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
({ __typeof (*(mem)) __result; \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.b @%1,%0\n\
cmp/eq %0,%3\n\
bf 1f\n\
mov.b %2,@%1\n\
1: mov r1,r15"\
: "=&r" (__result) : rNOSP (mem), rNOSP (newval), rNOSP (oldval) \
: "r0", "r1", "t", "memory"); \
__result; })
#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
({ __typeof (*(mem)) __result; \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
mov #-8,r15\n\
0: mov.w @%1,%0\n\
cmp/eq %0,%3\n\
bf 1f\n\
mov.w %2,@%1\n\
1: mov r1,r15"\
: "=&r" (__result) : rNOSP (mem), rNOSP (newval), rNOSP (oldval) \
: "r0", "r1", "t", "memory"); \
__result; })
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
({ __typeof (*(mem)) __result; \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.l @%1,%0\n\
cmp/eq %0,%3\n\
bf 1f\n\
mov.l %2,@%1\n\
1: mov r1,r15"\
: "=&r" (__result) : rNOSP (mem), rNOSP (newval), rNOSP (oldval) \
: "r0", "r1", "t", "memory"); \
__result; })
/* XXX We do not really need 64-bit compare-and-exchange. At least
not in the moment. Using it would mean causing portability
problems since not many other 32-bit architectures have support for
such an operation. So don't define any code for now. */
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
(abort (), (__typeof (*mem)) 0)
#define atomic_exchange_and_add(mem, value) \
({ __typeof (*(mem)) __result, __tmp, __value = (value); \
if (sizeof (*(mem)) == 1) \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.b @%2,%0\n\
mov %1,r2\n\
add %0,r2\n\
mov.b r2,@%2\n\
1: mov r1,r15"\
: "=&r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "memory"); \
else if (sizeof (*(mem)) == 2) \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.w @%2,%0\n\
mov %1,r2\n\
add %0,r2\n\
mov.w r2,@%2\n\
1: mov r1,r15"\
: "=&r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "memory"); \
else if (sizeof (*(mem)) == 4) \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.l @%2,%0\n\
mov %1,r2\n\
add %0,r2\n\
mov.l r2,@%2\n\
1: mov r1,r15"\
: "=&r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "memory"); \
else \
{ \
__typeof (mem) memp = (mem); \
do \
__result = *memp; \
while (__arch_compare_and_exchange_val_64_acq \
(memp, __result + __value, __result) == __result); \
(void) __value; \
} \
__result; })
#define atomic_add(mem, value) \
(void) ({ __typeof (*(mem)) __tmp, __value = (value); \
if (sizeof (*(mem)) == 1) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.b @%1,r2\n\
add %0,r2\n\
mov.b r2,@%1\n\
1: mov r1,r15"\
: "=&r" (__tmp) : rNOSP (mem), "0" (__value) \
: "r0", "r1", "r2", "memory"); \
else if (sizeof (*(mem)) == 2) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.w @%1,r2\n\
add %0,r2\n\
mov.w r2,@%1\n\
1: mov r1,r15"\
: "=&r" (__tmp) : rNOSP (mem), "0" (__value) \
: "r0", "r1", "r2", "memory"); \
else if (sizeof (*(mem)) == 4) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.l @%1,r2\n\
add %0,r2\n\
mov.l r2,@%1\n\
1: mov r1,r15"\
: "=&r" (__tmp) : rNOSP (mem), "0" (__value) \
: "r0", "r1", "r2", "memory"); \
else \
{ \
__typeof (*(mem)) oldval; \
__typeof (mem) memp = (mem); \
do \
oldval = *memp; \
while (__arch_compare_and_exchange_val_64_acq \
(memp, oldval + __value, oldval) == oldval); \
(void) __value; \
} \
})
#define atomic_add_negative(mem, value) \
({ unsigned char __result; \
__typeof (*(mem)) __tmp, __value = (value); \
if (sizeof (*(mem)) == 1) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.b @%2,r2\n\
add %1,r2\n\
mov.b r2,@%2\n\
1: mov r1,r15\n\
shal r2\n\
movt %0"\
: "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "t", "memory"); \
else if (sizeof (*(mem)) == 2) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.w @%2,r2\n\
add %1,r2\n\
mov.w r2,@%2\n\
1: mov r1,r15\n\
shal r2\n\
movt %0"\
: "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "t", "memory"); \
else if (sizeof (*(mem)) == 4) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.l @%2,r2\n\
add %1,r2\n\
mov.l r2,@%2\n\
1: mov r1,r15\n\
shal r2\n\
movt %0"\
: "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "t", "memory"); \
else \
abort (); \
__result; })
#define atomic_add_zero(mem, value) \
({ unsigned char __result; \
__typeof (*(mem)) __tmp, __value = (value); \
if (sizeof (*(mem)) == 1) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.b @%2,r2\n\
add %1,r2\n\
mov.b r2,@%2\n\
1: mov r1,r15\n\
tst r2,r2\n\
movt %0"\
: "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "t", "memory"); \
else if (sizeof (*(mem)) == 2) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.w @%2,r2\n\
add %1,r2\n\
mov.w r2,@%2\n\
1: mov r1,r15\n\
tst r2,r2\n\
movt %0"\
: "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "t", "memory"); \
else if (sizeof (*(mem)) == 4) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.l @%2,r2\n\
add %1,r2\n\
mov.l r2,@%2\n\
1: mov r1,r15\n\
tst r2,r2\n\
movt %0"\
: "=r" (__result), "=&r" (__tmp) : rNOSP (mem), "1" (__value) \
: "r0", "r1", "r2", "t", "memory"); \
else \
abort (); \
__result; })
#define atomic_increment_and_test(mem) atomic_add_zero((mem), 1)
#define atomic_decrement_and_test(mem) atomic_add_zero((mem), -1)
#define atomic_bit_set(mem, bit) \
(void) ({ unsigned int __mask = 1 << (bit); \
if (sizeof (*(mem)) == 1) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.b @%0,r2\n\
or %1,r2\n\
mov.b r2,@%0\n\
1: mov r1,r15"\
: : rNOSP (mem), rNOSP (__mask) \
: "r0", "r1", "r2", "memory"); \
else if (sizeof (*(mem)) == 2) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.w @%0,r2\n\
or %1,r2\n\
mov.w r2,@%0\n\
1: mov r1,r15"\
: : rNOSP (mem), rNOSP (__mask) \
: "r0", "r1", "r2", "memory"); \
else if (sizeof (*(mem)) == 4) \
__asm __volatile ("\
mova 1f,r0\n\
mov r15,r1\n\
.align 2\n\
mov #(0f-1f),r15\n\
0: mov.l @%0,r2\n\
or %1,r2\n\
mov.l r2,@%0\n\
1: mov r1,r15"\
: : rNOSP (mem), rNOSP (__mask) \
: "r0", "r1", "r2", "memory"); \
else \
abort (); \
})
#define atomic_bit_test_set(mem, bit) \
({ unsigned int __mask = 1 << (bit); \
unsigned int __result = __mask; \
if (sizeof (*(mem)) == 1) \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.b @%2,r2\n\
mov r2,r3\n\
or %1,r2\n\
mov.b r2,@%2\n\
1: mov r1,r15\n\
and r3,%0"\
: "=&r" (__result), "=&r" (__mask) \
: rNOSP (mem), "0" (__result), "1" (__mask) \
: "r0", "r1", "r2", "r3", "memory"); \
else if (sizeof (*(mem)) == 2) \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.w @%2,r2\n\
mov r2,r3\n\
or %1,r2\n\
mov.w %1,@%2\n\
1: mov r1,r15\n\
and r3,%0"\
: "=&r" (__result), "=&r" (__mask) \
: rNOSP (mem), "0" (__result), "1" (__mask) \
: "r0", "r1", "r2", "r3", "memory"); \
else if (sizeof (*(mem)) == 4) \
__asm __volatile ("\
mova 1f,r0\n\
.align 2\n\
mov r15,r1\n\
mov #(0f-1f),r15\n\
0: mov.l @%2,r2\n\
mov r2,r3\n\
or r2,%1\n\
mov.l %1,@%2\n\
1: mov r1,r15\n\
and r3,%0"\
: "=&r" (__result), "=&r" (__mask) \
: rNOSP (mem), "0" (__result), "1" (__mask) \
: "r0", "r1", "r2", "r3", "memory"); \
else \
abort (); \
__result; })
|
GitWeb