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authorNick Clifton <nickc@redhat.com>2001-01-11 21:20:20 +0000
committerNick Clifton <nickc@redhat.com>2001-01-11 21:20:20 +0000
commit0d2bcfafbfc1ede123ec9d61813745d775c5251c (patch)
treeae4a63e1af9df831594f61ef175e7f7a6e4a2567 /opcodes/arc-dis.h
parentFix gas 68HC12 indexed addressing code generation (diff)
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Updated ARC assembler from arccores.com
Diffstat (limited to 'opcodes/arc-dis.h')
-rw-r--r--opcodes/arc-dis.h80
1 files changed, 80 insertions, 0 deletions
diff --git a/opcodes/arc-dis.h b/opcodes/arc-dis.h
new file mode 100644
index 00000000000..992510c1cf7
--- /dev/null
+++ b/opcodes/arc-dis.h
@@ -0,0 +1,80 @@
+/* Disassembler structures definitions for the ARC.
+ Copyright (C) 1994, 1995, 1997, 1998 Free Software Foundation, Inc.
+ Contributed by Doug Evans (dje@cygnus.com).
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software Foundation,
+ Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
+
+#ifndef ARCDIS_H
+#define ARCDIS_H
+
+enum
+{
+ BR_exec_when_no_jump,
+ BR_exec_always,
+ BR_exec_when_jump
+};
+
+enum Flow
+{
+ noflow,
+ direct_jump,
+ direct_call,
+ indirect_jump,
+ indirect_call,
+ invalid_instr
+};
+
+enum { no_reg = 99 };
+enum { allOperandsSize = 256 };
+
+struct arcDisState
+{
+ void *_this;
+ int instructionLen;
+ void (*err)(void*, const char*);
+ const char *(*coreRegName)(void*, int);
+ const char *(*auxRegName)(void*, int);
+ const char *(*condCodeName)(void*, int);
+ const char *(*instName)(void*, int, int, int*);
+
+ unsigned char* instruction;
+ unsigned index;
+ const char *comm[6]; /* instr name, cond, NOP, 3 operands */
+ int opWidth;
+ int targets[4];
+ int addresses[4];
+ /* Set as a side-effect of calling the disassembler.
+ Used only by the debugger. */
+ enum Flow flow;
+ int register_for_indirect_jump;
+ int ea_reg1, ea_reg2, _offset;
+ int _cond, _opcode;
+ unsigned long words[2];
+ char *commentBuffer;
+ char instrBuffer[40];
+ char operandBuffer[allOperandsSize];
+ char _ea_present;
+ char _mem_load;
+ char _load_len;
+ char nullifyMode;
+ unsigned char commNum;
+ unsigned char isBranch;
+ unsigned char tcnt;
+ unsigned char acnt;
+};
+
+#define __TRANSLATION_REQUIRED(state) ((state).acnt != 0)
+
+#endif